ELEC ENG 2101 - Electronic Circuits

Course Details

Course Code	ELEC ENG 2101
Course	Electronic Circuits
Coordinating Unit	School of Electrical & Electronic Engineering
Term	Semester 1
Level	Undergraduate
Location/s	North Terrace Campus
Units	3
Contact	Up to 7 hours per week
Available for Study Abroad and Exchange	N
Prerequisites	ELEC ENG 1100
Incompatible	ELEC ENG 2105
Assessment	Quiz(zes), Tutorial preparation, practicals and Written exam

Course Staff

Course Coordinator: Dr Ali Pourmousavi Kani

Part A: Circuit Analysis Lectures
Name: Dr Ali Pourmousavi Kani
Email: a.pourm@adelaide.edu.au
Room: Ingkarni Wardli 3.55

Part B: Amplifiers, Diodes, Bipolar Transistors, Field-Effect Transistors
Name: Assoc. Prof. Wen Soong
Email: wen.soong@adelaide.edu.au
Room: Ingkarni Wardli 3.53

Practical Coordinator
Name: Dr Hong-Gunn Chew
Email: honggunn.chew@adelaide.edu.au
Room: Ingkarni Wardli 3.52

Course Timetable

The full timetable of all activities for this course can be accessed from .

This course consists of the following components:

1. Lectures and Quizzes
Three lectures a week starting in Week 1.
Three quizzes will be held in the semester during the set timeslots. (Note, these are different to the lectures time slots)

2. Tutorials
One tutorial every week of the semester, starting in Week 2.

3. Practicals
Please consult the course timetable for the location and starting times of the practicals

Course Learning Outcomes

On successful completion of this course students will be able to:

1	Apply systematic methods to the analysis of electric circuits in time and frequency domains
2	Determine the frequency response of circuits with passive components
3	Describe the physical principles, construction, characteristics, modelling and limitations of diodes, field-effect and bipolar junction transistors
4	Analyse the performance of diode and transistor circuits and simple transistor amplifiers as discrete and integrated devices
5	Model and analyse differential and simple amplifier circuits and describe the effect of non-idealities on their small signal, large signal and frequency response performance
6	Use a circuit simulation package to model circuits with passive and active components such as resistors, capacitors, diodes, and transistors
7	Construct and test simple amplifier circuits and measure their gain and frequency response

The above course learning outcomes are aligned with the Engineers Australia .
The course is designed to develop the following Elements of Competency: 1.1 1.2 1.3 1.4 1.5 2.1 2.2 2.3 2.4 3.1 3.2 3.4 3.5 3.6

University Graduate Attributes

This course will provide students with an opportunity to develop the Graduate Attribute(s) specified below:

University Graduate Attribute	Course Learning Outcome(s)
Deep discipline knowledge informed and infused by cutting edge research, scaffolded throughout their program of studies acquired from personal interaction with research active educators, from year 1 accredited or validated against national or international standards (for relevant programs)	1,2,3,4,5,6,7
Critical thinking and problem solving steeped in research methods and rigor based on empirical evidence and the scientific approach to knowledge development demonstrated through appropriate and relevant assessment	1,3,4,5
Teamwork and communication skills developed from, with, and via the SGDE honed through assessment and practice throughout the program of studies encouraged and valued in all aspects of learning	6,7
Self-awareness and emotional intelligence a capacity for self-reflection and a willingness to engage in self-appraisal open to objective and constructive feedback from supervisors and peers able to negotiate difficult social situations, defuse conflict and engage positively in purposeful debate	6,7

Required Resources

A set of course notes, practice problems and other supporting materials will also be available for downloading from the course web site.

Recommended Resources

The following book is a suggested reference for the course:
Adel S. Sedra and Kenneth C. Smith, “Microelectronic Circuits,” 6th Edition or higher (Oxford University Press).

Online Learning

Extensive use will be made of the MyUni web site for this course, https://myuni.adelaide.edu.au/courses/23420.

Course notes, tutorial problems and solutions, laboratory exercises and practice problems will all be available for downloading from the web site. Where the lecture theatre facilities permit, audio or video recordings of lectures will also be available for downloading.

Learning & Teaching Modes

This course relies on lectures as the primary delivery mechanism for the material. Tutorials supplement the lectures by providing exercises and example problems to enhance the understanding obtained through lectures. Practicals are used to provide hands-on experience for students to reinforce the theoretical concepts encountered in lectures. Continuous assessment activities provide formative assessment opportunities for students to gauge their progress and understanding.

Workload

The information below is provided as a guide to assist students in engaging appropriately with the course requirements.

The information below is provided as a guide to assist students in engaging appropriately with the course requirements.
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Activity		Contact Hours	Workload Hours
Lecture	36 x Lecturer	36	36 x 2
Tutorials	6 x Tutorials	6	6 x 2
Practicals	Pre-amplifier design, implementation and testing (7 x 3 sessions)	21	21 x 2
In-class tests	3 x Tests	3	3 x 4
Exam	1 x Exam	3	3 x 5
Total		69	153

Learning Activities Summary

Week	Lecture (T, W, F)	Topic	Lecturer	Tutorial	Practical (EC)	Practical (ECM)
Week 1 2-Mar	1	Introduction and course organisation Review of circuit principles	APK	APK
	2	Review of basic analysis methods (KCL, KVL) Systematic methods; nodal and mesh analysis	APK
	3	Superposition	APK
Week 2 9-Mar	4	RC and RL circuits – time domain analysis	APK
	5	Steady state sinusoids and frequency domain analysis	APK
	6	Frequency response and Bode plots	APK
Week 3 16-Mar	7	RLC networks – time domain	APK	APK
	8	RLC networks – frequency domain	APK
	9	Op Amps (review). Simple amplifiers. Integrator and differentiator (time domain)	APK
Week 4 23-Mar	10	Op amps – frequency domain analysis – HP and LP filters	APK		Op amps (Altium)
	11	Op amps – frequency domain analysis – bandpass and bandstop filters. Higher order filters	APK
	12	Op amps – non ideal properties.	APK
Week 5 30-Mar	13	Test 1 – Part 1	WLS	APK	Op amps (Altium)
	14	Diodes – DC characteristics	WLS
	15	Diode Physics	WLS
Week 6 6-Apr	16	Diode Application	WLS	WLS	Op amps (Altium)
	17	BJT structure	WLS
	18	BJT structure	WLS
Week 7 27-Apr		PUBLIC HOLIDAY TUESDAY			Op amps
	19	BJT circuit models	WLS
	20	BJT circuit models	WLS
Week 8 4-May	21	BJT circuit models	WLS	WLS	Op amps
	22	Review Lecture	WLS
	23	MOSFET structure	WLS
Week 9 11-May	24	Test 2 – Diode and BJT	WLS		Pre-amplifier	Op amps (Altium)
	25	MOSFET circuit models	WLS
	26	MOSFET circuit models	WLS
10 18-May	27	MOSFET - Complementary Structures - Amplifier	WLS	WLS	Pre-amplifier	Op amps (Altium)
	28	MOSFET - Complementary Structures - Amplifier	WLS
	29	BJT/MOSFET – Differential amplifier and current mirrors	WLS
Week 11 25-May	30	BJT/MOSFET – Differential amplifier and current mirrors	WLS			Op amps
	31	BJT/MOSFET – Differential amplifier and current mirrors	WLS
	32	Amplifier class and BJT output stage	WLS
Week 12 1-Jun	33	Amplifier classes and BJT output stage	WLS	WLS		Op amps
	34	Review Lecture	WLS
	35	Test 3 – MOSFET & Diff amp	WLS
Week 13	Swot Vac	Revision	APK/WLS

Specific Course Requirements

Students are required to have access to Altium software. This is available at various facilities such as the CATS suite or the undergraduate computer labs of the School of Electrical & Electronic Engineering. It is the individual student’s responsibility to ensure his or her access to these facilities at appropriate times is available.

The University's policy on Assessment for Coursework Programs is based on the following four principles:

Assessment must encourage and reinforce learning.
Assessment must enable robust and fair judgements about student performance.
Assessment practices must be fair and equitable to students and give them the opportunity to demonstrate what they have learned.
Assessment must maintain academic standards.

Assessment Summary

Assessment Task	Weighting (%)	Individual/ Group	Formative/ Summative	Due (week)*	Hurdle criteria	Learning outcomes
Tutorials	10	Individual	Formative	Weeks 2-12		1. 2. 3. 4. 5.
Practicals	20	Group	Formative	Weeks 4-10	Min 40%	5. 6. 7.
Tests	15	Individual	Summative	Weeks 4, 8, 11		1. 2. 3. 4. 5.
Examination	55	Individual	Summative	End of semester	Min 40%	1. 2. 3. 4. 5.
Total	100

* The specific due date for each assessment task will be available on MyUni.

This assessment breakdown is registered as an exemption to the University's . The exemption is related to the Procedures clause(s): 1. b. 3.

This course has a hurdle requirement. Meeting the specified hurdle criteria is a requirement for passing the course.

Due to the current COVID-19 situation modified arrangements have been made to assessments to facilitate remote learning and teaching. Assessment details provided here reflect recent updates.

Instead, of the invigilated exam requiring personal attendance, there will be an alternative assessment - without invigilation, administered through MyUni.

Assessment Related Requirements

The practical and the examination are hurdle requirements for this course. It is necessary to achieve at least 40% in both the practical and the exam. If this is not achieved, the total course mark will be limited to a maximum of 49.

A hurdle requirement is defined by the University's Assessment for Coursework Programs policy as "...an assessment task mandating a minimum level of performance as a condition of passing the course.If a student fails to meet a hurdle requirement (normally no less than 40%),and is assigned a total mark for the course in the range of 45-49, then the student is entitled to an offer of additional assessment of some type. The type of assessment is to be decided by the School Assessment Review Committee when determining final results. The student’s final total mark will be entered at no more than 49% and the offer of an additional assessment will be specified eg. US01. Once the additional assessment has been completed, this mark will be included in the calculation of the total mark for the course and the better of the two results will apply. Note however that the maximum final result for a course in which a student has sat an additional assessment will be a “50 Pass”.

If a student is unable to meet a hurdle requirement related to an assessment piece (may be throughout semester or at semester’s end) due to medical or compassionate circumstances beyond their control, then the student is entitled to an offer of replacement assessment of some type. An interim result of RP will be entered for the student, and the student will be notified of the offer of a replacement assessment. Once the replacement assessment has been completed, the result of that assessment will be included in the calculation of the total mark for the course.

Assessment Detail

No information currently available.

Submission

All written submissions to formative assessment activities are to be submitted to designated boxes within the School of Electrical & Electronic Engineering by 3:00pm on the specified dated and must be accompanied by a signed cover sheet. Copies of blank cover sheets are available from the School office in Ingkarni Wardli 3.26. No late submissions will be accepted. All formative assessments will have a two week turn-around time for provision of feedback to students.

Full details can be found on the School website:

Course Grading

Grades for your performance in this course will be awarded in accordance with the following scheme:

M10 (Coursework Mark Scheme)
Grade	Mark	Description
FNS		Fail No Submission
F	1-49	Fail
P	50-64	Pass
C	65-74	Credit
D	75-84	Distinction
HD	85-100	High Distinction
CN		Continuing
NFE		No Formal Examination
RP		Result Pending

Further details of the grades/results can be obtained from Examinations.

Grade Descriptors are available which provide a general guide to the standard of work that is expected at each grade level. More information at Assessment for Coursework Programs.

Final results for this course will be made available through .

The University places a high priority on approaches to learning and teaching that enhance the student experience. Feedback is sought from students in a variety of ways including on-going engagement with staff, the use of online discussion boards and the use of Student Experience of Learning and Teaching (SELT) surveys as well as GOS surveys and Program reviews.

SELTs are an important source of information to inform individual teaching practice, decisions about teaching duties, and course and program curriculum design. They enable the University to assess how effectively its learning environments and teaching practices facilitate student engagement and learning outcomes. Under the current SELT Policy (http://www.adelaide.edu.au/policies/101/) course SELTs are mandated and must be conducted at the conclusion of each term/semester/trimester for every course offering. Feedback on issues raised through course SELT surveys is made available to enrolled students through various resources (e.g. MyUni). In addition aggregated course SELT data is available.

The students liked:

•        Practicals: lots of students found the pracs interesting and insightful
•        Circuit Analysis Part: because it had more revision and easier to understand
•        Electronics parts: covers lots of technologies that is used in nowadays devices

Some students felt that:

•        More relation to real-world application is needed: Because the course covers a number of device technologies, however how that related to real applications was not emphasised.
•        Cover circuit analysis part before covering electronic devices: Some students, mainly mechatronics, felt disadvantaged versus EEE students. Though the EEE students have done more circuits material, it is likely that this is also associated with a lack of confidence in their own knowledge of electronics.
•        Tutorial marking was eating into the available tutorial time, even though with simple marking that was taking a significant time, between 15-30 mins
•        Better sync between tutorials and lectures as in some cases the time was too short to absorb the technical contents to attempt the questions

School response to SELT Feedback
•       Relevance to real-word application: This aspects will be further highlighted and made relevant to real-world problem during the course delivery.
•       Circuit Analysis part: The course has been restructured to allow the circuit analysis part delivered before the electronics part. Hopefully there should be no different in technical background knowledge between mechatronics and EEE students as the current program structure deals with that.
• Tutorial marking: Two options are considered, one to ask for submission of attempts before the start of the tutorial and have that passed to the student the same or second day. Another options is to do online submission.
•        Better sync between tutorials and lectures: This is an organisation problem and this is already considered when planning tutorial questions.

This section contains links to relevant assessment-related policies and guidelines - all university policies.

Students are reminded that in order to maintain the academic integrity of all programs and courses, the university has a zero-tolerance approach to students offering money or significant value goods or services to any staff member who is involved in their teaching or assessment. Students offering lecturers or tutors or professional staff anything more than a small token of appreciation is totally unacceptable, in any circumstances. Staff members are obliged to report all such incidents to their supervisor/manager, who will refer them for action under the university's student鈥檚 disciplinary procedures.

Authorised by:	Deputy Vice-Chancellor and Vice-President (Academic)
Maintained by:	Course Outlines Administrator

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