ELEC ENG 2105 - Electronic Circuits M
North Terrace Campus - Semester 1 - 2019
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General Course Information
Course Details
Course Code ELEC ENG 2105 Course Electronic Circuits M Coordinating Unit School of Electrical & Electronic Engineering Term Semester 1 Level Undergraduate Location/s North Terrace Campus Units 3 Contact Up to 7 hours per week Available for Study Abroad and Exchange N Incompatible MECH ENG 2015 Assumed Knowledge ELEC ENG 1100 Assessment Quiz(zes), tutorial preparation, practicals and written exam Course Staff
Course Coordinator: Associate Professor Brian Ng
Part A: Amplifiers, Diodes, Bipolar Transistors, Field-Effect Transistors
Name: Dr Said Al-Sarawi
Email: said.alsarawi@adelaide.edu.au
Room: Ingkarni Wardli 3.39
Part B: Operational Ampllifiers, Active Filters, Resonant Circuits
Name: Assoc. Prof. Wen Soong
Email: wen.soong@.adelaide.edu.au
Room: Ingkarni Wardli 3.53
Practical Coordinator
Name: Dr Hong-Gunn Chew
Email: honggunn.chew@adelaide.edu.au
Room: Ingkarni Wardli 3.52Course Timetable
The full timetable of all activities for this course can be accessed from .
This course consists of the following components:
1. Lectures and Quizzes
Three lectures a week starting in Week 1.
Three quizzes will be held in the semester during the lecture timeslots.
2. Tutorials
One tutorial every two weeks during even weeks, starting in Week 2.
3. Practicals
One three-hour practical session per week, starting in Week 9 and finishing in Week 12. The venue for the first few weeks will be in the CATS suite while the remaining practicals will take place in the EM3XX laboratories. -
Learning Outcomes
Course Learning Outcomes
On successful completion of this course students will be able to:
1 Explain the purpose and key performance parameters of amplifier circuits. 2 Describe the physical principles, construction, characteristics, modelling and limitations of diodes, field-effect and bipolar junction transistors. 3 Apply simple models of semiconductor devices to analyse simple circuits based on diodes and transistors. 4 Design amplifier circuits based on operational amplifiers, and explain the effects on performance of non-ideal properties of op amps. 5 Explain the applications and principles of operation of filters and resonant circuits. 6 Use a circuit simulation package to determine the expected performance of amplifier and filter circuits. 7 Construct, test and characterise the performance of amplifier and filter circuits.
The above course learning outcomes are aligned with the Engineers Australia .
The course is designed to develop the following Elements of Competency: 1.1 1.2 1.3 1.4 1.5 1.6 2.1 2.2 2.3 2.4 3.1 3.2 3.3 3.4 3.5 3.6
University Graduate Attributes
This course will provide students with an opportunity to develop the Graduate Attribute(s) specified below:
University Graduate Attribute Course Learning Outcome(s) Deep discipline knowledge
- informed and infused by cutting edge research, scaffolded throughout their program of studies
- acquired from personal interaction with research active educators, from year 1
- accredited or validated against national or international standards (for relevant programs)
1, 2, 4, 5, 7 Critical thinking and problem solving
- steeped in research methods and rigor
- based on empirical evidence and the scientific approach to knowledge development
- demonstrated through appropriate and relevant assessment
3, 4, 6, 7 Teamwork and communication skills
- developed from, with, and via the SGDE
- honed through assessment and practice throughout the program of studies
- encouraged and valued in all aspects of learning
6-7 -
Learning Resources
Required Resources
Text Book
Adel S. Sedra and Kenneth C. Smith, "Microelectronic Circuits," 6th Edition (or Higher), Oxford University Press.
A set of course notes, practice problems and other supporting materials will also be available for downloading from the course web site.Recommended Resources
The following book is a suggested reference for the course:
Adel S. Sedra and Kenneth C. Smith, “Microelectronic Circuits,” 6th Edition or higher (Oxford University Press).Online Learning
Extensive use will be made of the course web site. Course notes, tutorials, practicals and practice problems will be available. Where the lecture theatre facilities permit, recordings of lectures will also be available. -
Learning & Teaching Activities
Learning & Teaching Modes
This course relies on lectures as the primary delivery mechanism for the material. Tutorials supplement the lectures by providing exercises and example problems to enhance the understanding obtained through lectures. Practicals are used to provide hands-on experience for students to reinforce the theoretical concepts encountered in lectures. Continuous assessment activities provide formative assessment opportunities for students to gauge their progress and understanding.Workload
The information below is provided as a guide to assist students in engaging appropriately with the course requirements.
Activitiy Detail Contact Hours Workload Hours Lecture 30 lectures 30 60 Tutorials 6 tutorials 6 18 Practicals 9 3-hr sessions 27 36 In-class tests 3 tests 3 18 Exam 1 exam 3 30 Totals 69 162 Learning Activities Summary
Week
Lecture
(T, W, F)
Topic
Lecturer
Tutorial
Practical (EC)
Practical (ECM)
Week 1
27-Feb
1
Introduction and course organisation
Review of circuit principles
MJL
2
Review of basic analysis methods (KCL, KVL)
Systematic methods; nodal and mesh analysis
MJL
3
Superposition
MJL
Week 2
6-Mar
4
RC and RL circuits – time domain analysis
MJL
MJL
5
Steady state sinusoids and frequency domain analysis
MJL
6
Frequency response and Bode plots
MJL
Week 3
13-Mar
PH: M
7
RLC networks – time domain
MJL
8
RLC networks – frequency domain
MJL
9
Op Amps (review). Simple amplifiers. Integrator and differentiator (time domain)
MJL
Week 4
20-Mar
10
Op amps – frequency domain analysis – HP and LP filters
MJL
MJL
Op amps
(Altium)
11
Op amps – frequency domain analysis – bandpass and bandstop filters.
Higher order filters
MJL
12
Op amps – non ideal properties.
MJL
Week 5
27-Mar
13
Test 1 – Part 1
MJL
Op amps
(Altium)
14
Diodes – DC characteristics
SAS
15
Diode Physics
SAS
Week 6
3-Apr
16
Diode Application
SAS
SAS
Op amps
(Altium)
17
BJT structure
SAS
18
BJT structure
SAS
Week 7
24-Apr
PH: Tu
PUBLIC HOLIDAY TUESDAY
Op amps
19
BJT circuit models
SAS
20
BJT circuit models
SAS
Week 8
1-May
21
BJT circuit models
SAS
SAS
Op amps
22
Review Lecture
SAS
23
MOSFET structure
SAS
Week 9
8-May
24
Test 2 – Diode and BJT
SAS
Pre-amplifier
Op amps
(Altium)
25
MOSFET circuit models
SAS
26
MOSFET circuit models
SAS
10
15-May
27
MOSFET - Complementary Structures - Amplifier
SAS
SAS
Pre-amplifier
Op amps
(Altium)
28
MOSFET - Complementary Structures - Amplifier
SAS
29
BJT/MOSFET – Differential amplifier and current mirrors
SAS
Week 11
22-May
30
BJT/MOSFET – Differential amplifier and current mirrors
SAS
Op amps
31
BJT/MOSFET – Differential amplifier and current mirrors
SAS
32
Amplifier class and BJT output stage
SAS
Week 12
29-May
33
Amplifier classes and BJT output stage
SAS
SAS
Op amps
34
Review Lecture
SAS
35
Test 3 – MOSFET & Diff amp
SAS
Week 13
Swot Vac
Revision
SAS/MJL
Specific Course Requirements
Students are required to have access to Altium software. This is available at various facilities such as the CATS suite or the undergraduate computer labs of the School of Electrical & Electronic Engineering. It is the individual student’s responsibility to ensure his or her access to these facilities at appropriate times is available.Small Group Discovery Experience
Not applicable. -
Assessment
The University's policy on Assessment for Coursework Programs is based on the following four principles:
- Assessment must encourage and reinforce learning.
- Assessment must enable robust and fair judgements about student performance.
- Assessment practices must be fair and equitable to students and give them the opportunity to demonstrate what they have learned.
- Assessment must maintain academic standards.
Assessment Summary
Assessment Task Weighting (%) Individual/ Group Formative/ Summative Due (week)* Hurdle criteria Learning outcomes Tutorials 10 Individual Formative Weeks 2,4,6,8,19,12 1. 2. 3. 4. 5. In-class tests 15 Individual Summative Weeks 5,9,12 1. 2. 3. 4. 5. Practicals 20 Group Formative Throughout semester 3. 6. 7. Exam 55 Individual Summative End of semester Min 40% 1. 2. 3. 4. 5. Total 100
This assessment breakdown complies with the University's Assessment for Coursework Programs Policy.
This course has a hurdle requirement. Meeting the specified hurdle criteria is a requirement for passing the course.Assessment Related Requirements
The practical and the examination are hurdle requirements for this course. It is necessary to achieve at least 40% in both the practical and the exam. If this is not achieved, the total course mark will be limited to a maximum of 49.
A hurdle requirement is defined by the University's Assessment for Coursework Programs policy as "...an assessment task mandating a minimum level of performance as a condition of passing the course. If a student fails to meet a hurdle requirement (normally no less than 40%), and is assigned a total mark for the course in the range of 45-49, then the student is entitled to an offer of additional assessment of some type. The type of assessment is to be decided by the School Assessment Review Committee when determining final results. The student’s final total mark will be entered at no more than 49% and the offer of an additional assessment will be specified eg. US01. Once the additional assessment has been completed, this mark will be included in the calculation of the total mark for the course and the better of the two results will apply. Note however that the maximum final result for a course in which a student has sat an additional assessment will be a “50 Pass”.
If a student is unable to meet a hurdle requirement related to an assessment piece (may be throughout semester or at semester’s end) due to medical or compassionate circumstances beyond their control, then the student is entitled to an offer of replacement assessment of some type. An interim result of RP will be entered for the student, and the student will be notified of the offer of a replacement assessment. Once the replacement assessment has been completed, the result of that assessment will be included in the calculation of the total mark for the course.Assessment Detail
The tutorial papers require each student to submit written responses to selected sets of problems. The submissions may contain any of the following: written answers, mathematical derivations, sketches, graphs and print-outs from appropriate software packages. There will be 6 separate tutorials, each will be awarded a mark on a 0-2 scale based on effort. Assessment of the tutorials will occur in the Tutorial classes.
There are three 50 minute closed book tests in the course. The tests will require students to submit short written responses to a set of questions under examination conditions. Each test will be worth 5% to the overall assessment.
The practical needs to be conducted during the designated laboratory sessions as listed in the Course Timetable. Students will be required to submit a written report to the practical work, which is assessed. The practical reports will be worth 15% of the overall assessment.
The exam will be a closed book examination.Submission
All written submissions to formative assessment activities are to be submitted to designated boxes within the School of Electrical & Electronic Engineering by 3:00pm on the specified dated and must be accompanied by a signed cover sheet. Copies of blank cover sheets are available from the School office in Ingkarni Wardli 3.26. No late submissions will be accepted. All formative assessments will have a two week turn-around time for provision of feedback to students.
Full details can be found on the School website:
http://eleceng.adelaide.edu.au/current-students/undergraduate/Course Grading
Grades for your performance in this course will be awarded in accordance with the following scheme:
M10 (Coursework Mark Scheme) Grade Mark Description FNS Fail No Submission F 1-49 Fail P 50-64 Pass C 65-74 Credit D 75-84 Distinction HD 85-100 High Distinction CN Continuing NFE No Formal Examination RP Result Pending Further details of the grades/results can be obtained from Examinations.
Grade Descriptors are available which provide a general guide to the standard of work that is expected at each grade level. More information at Assessment for Coursework Programs.
Final results for this course will be made available through .
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Student Feedback
The University places a high priority on approaches to learning and teaching that enhance the student experience. Feedback is sought from students in a variety of ways including on-going engagement with staff, the use of online discussion boards and the use of Student Experience of Learning and Teaching (SELT) surveys as well as GOS surveys and Program reviews.
SELTs are an important source of information to inform individual teaching practice, decisions about teaching duties, and course and program curriculum design. They enable the University to assess how effectively its learning environments and teaching practices facilitate student engagement and learning outcomes. Under the current SELT Policy (http://www.adelaide.edu.au/policies/101/) course SELTs are mandated and must be conducted at the conclusion of each term/semester/trimester for every course offering. Feedback on issues raised through course SELT surveys is made available to enrolled students through various resources (e.g. MyUni). In addition aggregated course SELT data is available.
The students liked:
• Practicals: lots of students found the pracs interesting and insightful
• Circuit Analysis Part: because it had more revision and easier to understand
• Electronics parts: covers lots of technologies that is used in nowadays devices
Some students felt that:
• More relation to real-world application is needed: Because the course covers a number of device technologies, however how that related to real applications was not emphasised.
• Cover circuit analysis part before covering electronic devices: Some students, mainly mechatronics, felt disadvantaged versus EEE students. Though the EEE students have done more circuits material, it is likely that this is also associated with a lack of confidence in their own knowledge of electronics.
• Tutorial marking was eating into the available tutorial time, even though with simple marking that was taking a significant time, between 15-30 mins
• Better sync between tutorials and lectures as in some cases the time was too short to absorb the technical contents to attempt the questions
School response to SELT Feedback
• Relevance to real-word application: This aspects will be further highlighted and made relevant to real-world problem during the course delivery.
• Circuit Analysis part: The course has been restructured to allow the circuit analysis part delivered before the electronics part. Hopefully there should be no different in technical background knowledge between mechatronics and EEE students as the current program structure deals with that.
• Tutorial marking: Two options are considered, one to ask for submission of attempts before the start of the tutorial and have that passed to the student the same or second day. Another options is to do online submission.
• Better sync between tutorials and lectures: This is an organisation problem and this is already considered when planning tutorial questions. -
Student Support
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Policies & Guidelines
This section contains links to relevant assessment-related policies and guidelines - all university policies.
- Academic Credit Arrangements Policy
- Academic Integrity Policy
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- Modified Arrangements for Coursework Assessment Policy
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- Student Experience of Learning and Teaching Policy
- Student Grievance Resolution Process
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